Colloidal quantum dots (QDs) have gained tremendous attention as a new class of nanomaterials that can potentially enable the next-generation solution-processible electronic and optoelectronic devices (Science 353, aac5523, 2016). Owing to their superior optical properties, intense studies on QD-based color converters, light-emitting diodes (Nature 515, 96, 2014, Nat. Photon. 12, 159, 2018) and solar cells (Nat. Nanotechnol. 13, 456, 2018) have been underway leading to successful commercialization of the QD-display technology. The next frontier is exploration of electronically coupled QD solids in the context of prospective applications in solution-processable flexible electronics toward wearable electronic and sensing systems. One existing challenge in this area is low mobility of QD films, which limits performance characteristics of QD-based field-effect transistors (FETs) that represent basic building blocks of electronic circuits. Low mobilities lead to low ON-currents of typical QD-FETs. Increase in the current is possible by reducing the FET channel length, however, this would require the use of expensive and nonscalable patterning methods such as e-beam lithography.
Here, we demonstrate high ON-current QD p-type FETs by employing a vertical architecture, which is a vertical stack of a gate electrode, a gate insulator, a source electrode, semiconducting transport layer, and a drain electrode. Using this approach, we reduce a channel length down to submicron-meter scale, and as a result, achieve an unprecedented ON-current of ~0.1 A/cm2, which is three orders of magnitude higher than in standard lateral FETs. This notably high ON-current of vertical QD FETs is demonstrated using environmentally-benign Zn-doped CuInSe2 QDs (J. Am. Chem. Soc. 138, 4201, 2016) and achieved despite their low hole mobility of ~0.001 cm2/Vs. A switchable behavior of a vertical FET is enabled by the porous structure of a source electrode which allows for the gate-controlled electric field to penetrate into a vertical channel and modulate a charge carrier density. The pattern of the source electrode is defined by optical interferometric lithography, which is a simple, fast, scalable and mask-less patterning method. To improve switching properties of the FET, a charge-blocking layer was applied to the top surface of the patterned source electrodes. This allows us to steer the charge flow in a lateral direction along the gate oxide interface, which is the well-modulated channel region by gate bias. Owing to high current density (~0.1 A/cm2) with a switchable behavior of the developed vertical QD-FETs, it can be used as a new platform to enable a variety of QD-based sensing, electronic and optoelectronic applications such as photodetector, light-emitting transistor, and infrared-to-visible up-converters.